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____________________________________________________________________
07-0870-01 October 1998
EPC
-5A
Hardware & Software
Reference Manual
RadiSys Corporation
5445 NE Dawson Creek Drive
Hillsboro, Oregon 97124
Phone: (503) 615-1100
Fax: (503) 615-1150
http://www.radisys.com
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Strany 1 - Reference Manual

____________________________________________________________________07-0870-01 October 1998EPC-5AHardware & SoftwareReference Manual RadiSys Cor

Strany 2

EPC-5A Hardware & Software Reference ManualPage 211Chapter 6 Programming the VMEbus Interface. Describes Slot-1 controllerfunctions, slave- and se

Strany 3 - Hardware Warranty

EPC-5A Hardware & Software Reference ManualPage 9499Symptoms Possible cause(s) SolutionSystem fails at power-up -will not run power-on self-test.T

Strany 4 - Table of Contents

Chapter 9: Troubleshooting & Error MessagesPage 9599Common Error MessagesThis section contains a summary of error and warning messages alphabetize

Strany 5

EPC-5A Hardware & Software Reference ManualPage 9699DISK BOOT FAILURE, INSERT SYSTEM DISK AND PRESS ENTERProblem: No boot disk could be found.Solu

Strany 6

Chapter 9: Troubleshooting & Error MessagesPage 9799ERROR INITIALIZING HARD DISK 0Problem: The IDE disk controller for drive C cannot be initializ

Strany 7 - List of Illustrations

EPC-5A Hardware & Software Reference ManualPage 9899GENERAL FAILURE READING DRIVE ...Problem: This almost always indicates the presence of an unfo

Strany 8 - List of Tables

Chapter 9: Troubleshooting & Error MessagesPage 9999MEMORY PARITY INTERRUPT AT ...Problem: This could be a software error (reading a nonexistent m

Strany 9 - 1. Product Description

EPC-5A Hardware & Software Reference ManualPage 10099NOT READY READING DRIVE ...Problem: This is usually caused by not fully inserting a diskette

Strany 10 - Notational Conventions

Chapter 9: Troubleshooting & Error MessagesPage 10199

Strany 11 - Product Overview

EPC-5A Hardware & Software Reference ManualPage 10299Boot FailuresThe System BIOS attempts to display an error message on the display and halts wh

Strany 12 - Specifications

Chapter 9: Troubleshooting & Error MessagesPage 10399Phoenix NuBIOS CheckpointsThe Phoenix NuBIOS writes a number of checkpoints to I/O port 80h

Strany 13

Chapter 1: Product DescriptionPage 311Product OverviewThe EPC-5A is a PC/AT compatible embedded CPU module containing thefollowing:• 100 MHz Intel486

Strany 14

EPC-5A Hardware & Software Reference ManualPage 1049938h Shadow system BIOS ROM39h Reinitialize the cache3Ah Autosize cache3Ch Configure advanced

Strany 15 - 2. Before Installation

Chapter 9: Troubleshooting & Error MessagesPage 1059982h Detect and install external RS232 ports84h Detect and install external parallel ports85h

Strany 16

EPC-5A Hardware & Software Reference ManualPage 10699Beep Code Post Code Checkpoint DescriptionD0h Interrupt handler errorD2h Unknown interrupt er

Strany 17 - Product VME Slots Total

Page 10710 1010. Support and ServiceIn North AmericaTechnical SupportRadiSys maintains a technical support phone line at (503) 615-1100 that is staff

Strany 18 - VMEbus Slots

EPC-5A Hardware & Software Reference ManualPage 10810 10Repair ServicesFactory Repair Service is provided for all RadiSys products. Standard serv

Strany 19

Chapter 10: Support and ServicePage 10910 10All non-warranty repairs are subject to service charges. RadiSys has determined thatpricing repairs based

Strany 20

EPC-5A Hardware & Software Reference ManualPage 11010 10When shipping the product, include the following information: return address, contactname

Strany 21 - J1 Connector

Page A-1AAAppendix A: Chip Set & I/OMapThe following defines the I/O addresses decoded by the EPC-5A. It does not defineaddresses that might be d

Strany 22

EPC-5A Hardware & Software Reference ManualAAPage A-2Counter-Timer functions:R400 emulating 8254 of PC/ATI/O Addr Functional group Usage040 Timer

Strany 23 - 3. Installation

Appendix A: Chip Set & I/O MapAAPage A-3Second Interrupt Controller:R400 emulating 8259 of PC/ATI/O Addr Functional group Usage0A0 Interrupt contr

Strany 24 - EXP-BP2 Subplane

EPC-5A Hardware & Software Reference ManualPage 411SpecificationsEnvironmentalTemperature operating 0° to 60° Cstorage -40° to 85° CHumidity opera

Strany 25 - EXP-BP4 Subplane

EPC-5A Hardware & Software Reference ManualAAPage A-4Coprocessor Interface:On the EPC-5A, 486’s built-in coprocessor replaces the 80287 of PC/ATI

Strany 26 - EXP-BP3A Subplane

Appendix A: Chip Set & I/O MapAAPage A-5EPC-5A Memory Mapping Registers:No PC/AT equivalentI/O Addr Functional group Usage8130 VME and misc contro

Strany 27 - EXP-BP5 Subplane

EPC-5A Hardware & Software Reference ManualAAPage A-6NOTES

Strany 28 - EXP-BP4A Subplane

BBPage B-1Appendix B: Interrupts andDMA ChannelsInterruptsThe assignment of interrupts for the EPC-5A is shown in the following table: NMI DRAM parit

Strany 29 - EXP-BP6 Subplane

EPC-5A Hardware & Software Reference ManualBBPage B-2DMA ChannelsThe assignment of DMA channels for the EPC-5A is shown in the following table.0 u

Strany 30 - EPC-5A Insertion

Page C-1CCAppendix C: Flash BootDeviceThe system BIOS is based on the Phoenix NuBIOS version 4.05 implementedas a Flash BIOS using the Intel 28F004B

Strany 31

EPC-5A Hardware & Software Reference ManualPage C-2CCThe Flash Boot Device is organized according to the following diagram:Figure C-1. Flash Boot

Strany 32 - EXM Module Insertion

Appendix C: Flash Boot DevicePage C-3CCThe following table describes the exact sizes and placement of the various code anddata objects present in the

Strany 33 - Keyboard

EPC-5A Hardware & Software Reference ManualPage C-4CCThe update process occurs as a self-hosted FBD update when the system can boot toMS-DOS. The

Strany 34 - Parallel Printer Port

Appendix C: Flash Boot DevicePage C-5CCThe update process is outlined in the following flow chart:Figure C-2. Flash Boot Device Recovery Mechanism.Fo

Strany 35 - 4. BIOS Configuration

Chapter 1: Product DescriptionPage 5116. Support for “User BIOS Extensions” which allows, through BIOSextensions, booting from VME or EXM-2A, etc. N

Strany 36

EPC-5A Hardware & Software Reference ManualPage C-6CCSystem BIOS recovery operates in detail as follows:1. The boot block prepares the system har

Strany 37 - Main BIOS Setup Menu

Appendix C: Flash Boot DevicePage C-7CCThe Reflash Flash update program requires the /F and /O command linearguments; the /P is optional. This inform

Strany 38

EPC-5A Hardware & Software Reference ManualPage C-8CCUser BIOS ExtensionsThe EPC-5A supports several different boot methods and OSes. In order to

Strany 39 - IDE Adapter Sub-menus

Appendix C: Flash Boot DevicePage C-9CCPicoCard Flash File SystemThe EPC-5A contains a BIOS used to access the Flash as a read/write disk. If the use

Strany 40

EPC-5A Hardware & Software Reference ManualPage C-10CCNOTES

Strany 41 - Memory Shadow Sub-Menu

Page D-1DDAppendix D -PFormatThe EPC-5A supports use of EXM-2A flash cards as Chapter 2 discusses. Thesupported configurations require the use of app

Strany 42 - Boot Options Sub-menu

EPC-5A Hardware & Software Reference ManualPage D-2DDStep 1B (Load as BIOS extension)Note that if the driver is loaded as a BIOS extension, the sy

Strany 43

PFormatPage D-3DDStep 2: Format the driveAssuming that the driver loaded successfully (either as a device driver or as aBIOS extension), run the PFORM

Strany 44 - Keyboard Features Sub-menu

EPC-5A Hardware & Software Reference ManualPage D-4DDNOTES

Strany 45 - Advanced Menu

G-1Appendix G: Glossary  A Access Time: A factor in measurement of a memory storage device’s operating speed.It is the amount of time required to pe

Strany 46

EPC-5A Hardware & Software Reference ManualPage 611NOTES

Strany 47 - EXM Menu

EPC-5A Hardware ReferenceG-2 B Basic Input/Output System (BIOS): Firmware in a PC-compatible computer thatruns when the computer is powered up. The

Strany 48

GlossaryG-3Boot Sequence: The order in which a computer searches external storage devices foran operating system to boot. The boot device must be the

Strany 49

EPC-5A Hardware ReferenceG-4CMOS Save and Restore (CSR): A System BIOS feature that allows the user tobackup the contents of CMOS RAM (contained with

Strany 50 - VME Menu

GlossaryG-5Extended Data Out (EDO): A type of DRAM that allows higher memory systemperformance since the data pins are still driven when CAS# is de-as

Strany 51

EPC-5A Hardware ReferenceG-6 G Gigabyte (GB or GByte): Approximately one billion (US) or one thousand million(Great Britain) bytes. 230 = 1,073,741,

Strany 52 - Exit Menu

GlossaryG-7Interrupt Request (IRQ): In ISAbus systems, a microprocessor input from thecontrol bus used by I/O devices to interrupt execution of the cu

Strany 53

EPC-5A Hardware ReferenceG-8Memory: A designated system area to which data can be stored and from which datacan be retrieved. A typical computer syste

Strany 54

GlossaryG-9Pinout: A diagram or table describing the location and function of pins on anelectrical connector.Plastic Quad Flat Pack (PQFP): A popular

Strany 55 - 5. Theory of Operation

EPC-5A Hardware ReferenceG-10Real Time Clock (RTC): Peripheral circuitry on a computer motherboard whichprovides a nonvolatile time-of-day clock, an a

Strany 56

GlossaryG-11Serial Port: A physical connection with a computer for the purpose of serial dataexchange with a peripheral device. The port requires an I

Strany 57 - Memory Map

Page 7222. Before InstallationUnpack the EPC-5A and inspect it for shipping damage.▲▲!CAUTIONDo not remove the EPC-5A module from its anti-static bagu

Strany 58 - Real Time Clock

EPC-5A Hardware ReferenceG-12 U Universal Serial Bus (USB): A new serial data bus that is intended to eliminate theneed for separate serial, parall

Strany 59 - Bootable Device Precedence

Page I-IIndexAA16, 3, 58, 59, 60, 72, 77, 78, 79A24, 3, 58, 59, 60, 63, 69, 70, 72, 78A32, 3, 58, 59, 60, 63, 69, 70, 72, 78,81access time, G-1ACFAIL,

Strany 60

EPC-5A Hardware & Software Reference ManualPage I-IIchassis, 13Chipsetterm defined, G-3CMOS RAM, 27, 52CMOS Setup, 97CMOS setup parameters, 52COM1

Strany 61 - Front Panel LEDs

IndexPage I-IIIFFast Page Mode DRAMsterm defined, G-5Flash Boot Deviceterm defined, G-5Flash memory, 3Flash Recoveryterm defined, G-5Flash Updateterm

Strany 62 - EXM Expansion Interface

EPC-5A Hardware & Software Reference ManualPage I-IVMEMORY PARITY INTERRUPT,99memory upgrades, 48, 91message high register, 73message interrupt, 7

Strany 63 - 6. The VMEbus Interface

IndexPage I-Vservant, 72service, 107setup parameters, 52setup screen, 25, 53shadowing, 51SIMMs, 48, 91Single In-Line Memory Module(SIMM)term defined,

Strany 64 - Concepts

EPC-5A Hardware & Software Reference ManualPage I-VINOTES

Strany 65 - Direct VMEbus Accesses

EPC-5A Hardware & Software Reference ManualPage 822Slot-1 ControllerJumperP1P2FrontPanelJP1JumpersFigure 2-1. Slot-1 Jumper Location.Additionally,

Strany 66 - Byte Ordering

Chapter 2: Before InstallationPage 922The EPC-5A plus EXM expansion modules plus any mass storage module can beconsidered together as a single subsyst

Strany 67 - Motorola

EPC-5A Hardware & Software Reference ManualPage 1022Installing the VMEbus Backplane JumpersThe VMEbus specification provides four bus grant signal

Strany 68

Chapter 2: Before InstallationPage 1122indicates jumper neededFigure 2-3. Backplane Jumpers Required for EPC-5A Subsystem.The figure above shows the E

Strany 69

EPC-5A Hardware & Software Reference ManualPage iiEPC, iRMX, INtime, Inside Advantage and RadiSys are registered trademarks ofRadiSys Corporation.

Strany 70 - Read-Modify-Write Operations

EPC-5A Hardware & Software Reference ManualPage 1222Single Board Computerthat only handlesIACK & BG3"Dumb" SlaveDoes not handleany o

Strany 71 - VMEbus Interrupt Response

Chapter 2: Before InstallationPage 1322If the stake pins are on the rear of the backplane, the most common location is in themiddle of the J1 connecto

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EPC-5A Hardware & Software Reference ManualPage 1422JumpersThe complete table of EPC-5A jumpers is shown below. Jumpers are shown in Figure2-1.Jum

Strany 73

Page 1533 3. Installation▲▲!CAUTIONDuring all of this installation process, make sure that power toyour system is OFF.The EPC-5A is not designed to be

Strany 74 - Interrupt Generator Register

EPC-5A Hardware & Software Reference ManualPage 1633EXP-BP2 SubplaneThis subplane is used in the smallestconfiguration, where only the EPC-5Aproce

Strany 75 - 100A321111 Upper

Chapter 3: InstallationPage 1733EXP-BP4 SubplaneThe EXP-BP4 subplane is usedto couple an EPC-5A processormodule with an EXP-MX MassStorage module. Th

Strany 76 - 11000100 Lower

EPC-5A Hardware & Software Reference ManualPage 1833EXP-BP3A SubplaneThe EXP-BP3A subplane is used to addan EXP-MC Module Carrier for theaddition

Strany 77 - 00011 SLAVE BASE Upper

Chapter 3: InstallationPage 1933EXP-BP5 SubplaneThe EXP-BP5 subplane is usedin a configuration to couple anEPC-5A processor module withan EXP-MC Modul

Strany 78 - 00001RRDY WRDY 1 Upper

EPC-5A Hardware & Software Reference ManualPage 2033EXP-BP4A SubplaneThe EXP-BP4A subplane is used to addeither• two EXP-MC Module Carriersor• one

Strany 79 - RAM Upper

Chapter 3: InstallationPage 2133EXP-BP6 SubplaneThe EXP-BP6 subplane is usedin a configuration to couple anEPC-5A processor module withan EXP-MX Mass

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EPC-5A Hardware & Software Reference ManualPage iiiHardware WarrantyRadiSys Corporation ("RadiSys") warrants the EPC system and componen

Strany 81 - 11111ACFA BERR SYSF

EPC-5A Hardware & Software Reference ManualPage 2233EPC-5A InsertionAfter installing the subplane, the EPC-5A processor module can be inserted int

Strany 82 - 11111 INTERRUPT-OUT

Chapter 3: InstallationPage 2333EXP-MC Module Carrier InsertionIf one or more EXP-MC Module Carriers are part of the configuration, they areinserted i

Strany 83 - VMEbus Mapped Registers

EPC-5A Hardware & Software Reference ManualPage 2433EXP-MX Mass Storage Module Insertion▲▲!CAUTIONHandle the mass storage module with care. Avoid

Strany 84 - Supported Address Modifiers

Chapter 3: InstallationPage 2533Connecting Peripherals to the EPC-5A▲▲!CAUTIONDo not plug in any cable connector into the front panelconnectors while

Strany 85 - VMEbus Accesses

EPC-5A Hardware & Software Reference ManualPage 2633Serial PortsThe front panel contains two DB-9 DTE serial-port connectors. They are standardRS

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Page 27444. BIOS ConfigurationIntroductionThe EPC-5A uses the Phoenix NuBIOS to configure and select various systemoptions. This section details the v

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EPC-5A Hardware & Software Reference Manual44Page 28Figure 4-1. BIOS Setup Menu Map.Use the up and down cursor (arrow) keys to move from field to

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Chapter 4: BIOS Configuration44Page 29Main BIOS Setup MenuThe Main BIOS Setup Menu is shown below.The fields in each menu and sub-menu are explained b

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EPC-5A Hardware & Software Reference Manual44Page 30IDE Adapter 0 Master/Slave: Sub-menusThese fields are headings for menus that allow entering c

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Chapter 4: BIOS Configuration44Page 31IDE Adapter Sub-menusThere are a total of two IDE adapter sub-menus for the primary hard disk controller,in a ma

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EPC-5A Hardware & Software Reference ManualPage ivTable of Contents1. Product Description...

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EPC-5A Hardware & Software Reference Manual44Page 32TypeIf you are using a pre-configured system, you probably have an IDE hard disk drive.Select

Strany 93 - 7. Connectors

Chapter 4: BIOS Configuration44Page 33Memory Shadow Sub-MenuThe term “shadowing” refers to the technique of copying BIOS extensions from ROMinto DRAM

Strany 94 - Parallel Port

EPC-5A Hardware & Software Reference Manual44Page 34Boot Options Sub-menuUse the Boot Options sub-menu to change the boot sequence options. Select

Strany 95 - Battery Header

Chapter 4: BIOS Configuration44Page 352. C: then A: Used to boot from the C: drive, or if none is present, bootfrom the A: drive.3. C: only: Used to b

Strany 96

EPC-5A Hardware & Software Reference Manual44Page 36Keyboard Features Sub-menuThe Keyboard Features Sub-menu allows you to enable or disable vario

Strany 97 - 8. Upgrades

Chapter 4: BIOS Configuration44Page 37Keyboard auto-repeat delayUse this option to set the delay between when a key is pressed and when the auto-repea

Strany 98

EPC-5A Hardware & Software Reference Manual44Page 38Large Disk Access ModeIf a hard disk larger than 528MB is being used, this selection should be

Strany 99 - Messages

Chapter 4: BIOS Configuration44Page 39EXM MenuUse the options in this menu to select and configure the available EXM slots.The required configuration

Strany 100

EPC-5A Hardware & Software Reference Manual44Page 40Option Byte 1This option is used to select the first option byte value for the EXM card intend

Strany 101 - Common Error Messages

Chapter 4: BIOS Configuration44Page 41When using EXMs with configurable interrupts, DMA channels, I/O addresses, and/ormemory addresses, avoid conflic

Strany 102

EPC-5A Hardware & Software Reference ManualPage vAdvanced Menu ...

Strany 103 - EXM CONFIGURATION ERROR

EPC-5A Hardware & Software Reference Manual44Page 42VME MenuThe options in the VME menu are used to configure the EPC-5A’s VME interface.The VME M

Strany 104 - INVALID DRIVE SPECIFICATION

Chapter 4: BIOS Configuration44Page 43Bus ReleaseThis option is used to select the method that the EPC-5A uses to release the VMEbusfor other bus mast

Strany 105 - NON-SYSTEM DISK OR DISK ERROR

EPC-5A Hardware & Software Reference Manual44Page 44Exit MenuThe options in this menu allow saving settings and exiting, or abandoning changes and

Strany 106 - NOT READY READING DRIVE

Chapter 4: BIOS Configuration44Page 45The System BIOS software searches the FBD for the unterminated string“RadiSysCMOS--->” at power-up. This foo

Strany 107 - Page 101

EPC-5A Hardware & Software Reference Manual44Page 46Load previous valuesThis option is used to load the system with the previous values before an

Strany 108 - Boot Failures

Page 47555. Theory of OperationThe EPC-5A is a PC/AT compatible processor. Most of the standard functions of thePC architecture is embodied in the R

Strany 109 - Phoenix NuBIOS Checkpoints

EPC-5A Hardware & Software Reference ManualPage 4855The core logic system support provided by the R400EX includes the following:RadiSysR400EXPC-Co

Strany 110

Chapter 5: Theory of OperationPage 4955Memory MapThe 232 byte physical address space seen by the Intel486 occupies three areas:1. Addresses between 0

Strany 111

EPC-5A Hardware & Software Reference ManualPage 5055For a 32 MB EPC-5A, the extended memory address space is defined as00100000 01FFFFFF 32764 KB

Strany 112

Chapter 5: Theory of OperationPage 5155Keyboard ControllerThe R400EX contains an Intel 8042-compatible keyboard controller. The keyboardcontroller is

Strany 113 - 10. Support and Service

EPC-5A Hardware & Software Reference ManualPage viParallel Port...

Strany 114 - Non-Warranty Services

EPC-5A Hardware & Software Reference ManualPage 5255If there is more than one BIOS extension, the extension that is located at the highestphysica

Strany 115 - Arranging Service

Chapter 5: Theory of OperationPage 5355Video ControllersThe EPC-5A can operate with or without a video controller (such as the EXM-13B orEXM-13A). Th

Strany 116 - Other Countries

EPC-5A Hardware & Software Reference ManualPage 5455Resetting the EPC-5AThere are a number of ways to reset (reboot) the EPC-5A.Power-off, Power-o

Strany 117 - Page A-1

Page 57666. The VMEbus InterfaceThis chapter describes the EPC-5A VMEbus interface as seen by a program. Usersshould avoid direct use of most of the

Strany 118 - Page A-2

EPC-5A Hardware & Software Reference ManualPage 5866When configured as the Slot-1 controller, the EPC-5A detects and terminates datatransfer bus t

Strany 119 - Page A-3

Chapter 6: The VMEbus InterfacePage 59It should be noted that the EPC-5A drives all 32 address lines even when performingan A24 or A16 access. Theref

Strany 120 - Page A-4

EPC-5A Hardware & Software Reference ManualPage 6066When accessing the VMEbus in this manner, the source of the VMEbus address linesis defined bel

Strany 121 - Page A-5

Chapter 6: The VMEbus InterfacePage 61• Big endian, characteristic of Motorola microprocessors and the VMEbusenvironment in general, where the most-si

Strany 122 - Page A-6

EPC-5A Hardware & Software Reference ManualPage 6266486AddressMotorolaAddressAddrAddr+1Addr+2Addr+3AddrAddr+1Addr+2Addr+3LSBMSB103254761032 54 76A

Strany 123 - DMA Channels

Chapter 6: The VMEbus InterfacePage 63Slave Accesses from the VMEbusWhen SLE (Slave Enable) in the status/control register (8145h) is set, the EPC-5A’

Strany 124

EPC-5A Hardware & Software Reference ManualPage viiList of IllustrationsFigure 2-1. Slot-1 Jumper Location ...

Strany 125 - Appendix C: Flash Boot

EPC-5A Hardware & Software Reference ManualPage 6466Self Accesses Across the VMEbusSince the EPC-5A’s DRAM can be mapped into the VMEbus A24 or A3

Strany 126 - 28F004BV-T

Chapter 6: The VMEbus InterfacePage 65When a VMEbus slave read access occurs to the local DRAM, the EPC-5A watchesthe VMEbus data and address strobes

Strany 127 - Flash Boot Device Reflashing

EPC-5A Hardware & Software Reference ManualPage 6666Registers Specific to the EPC-5ARegisters in the I/O space that are specific to the EPC-5A are

Strany 128

Chapter 6: The VMEbus InterfacePage 67Protocol Register, lower01011111 8149hProtocol Register, upperLOCK 1 ABMH 1 1 ULA 814AhResponse Register, lower0

Strany 129 - Appendix C: Flash Boot Device

EPC-5A Hardware & Software Reference ManualPage 6866VME Event Enable RegisterDONE AS DS0 DS1 1 1 (res.) 1 8156hModule Status/Control Register11111

Strany 130 - Reflashing using REFLASH.EXE

Chapter 6: The VMEbus InterfacePage 69VME A21-16 Address Register (8130h)VMEbus Address bits 21-16 Res ResWhen an access is performed by the EPC-5A in

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EPC-5A Hardware & Software Reference ManualPage 7066A32 If set (1), the EPC-5A’s DRAM is mapped into the VMEbus A32 addressspace. If clear, the D

Strany 132 - User BIOS Extensions

Chapter 6: The VMEbus InterfacePage 71ARBPRI Arbitration priority. This defines the level at which the EPC-5A arbitratesfor the VMEbus. 11 means 3,

Strany 133 - PicoCard Flash File System

EPC-5A Hardware & Software Reference ManualPage 7266If A32 and SLE are set, the value in port 8147 defines the base address of theEPC-5A’s memory

Strany 134 - Page C-10

Chapter 6: The VMEbus InterfacePage 73WRDY Write ready. If set, the message registers are armed for an incoming mes-sage. When a write occurs into t

Strany 135 - Appendix D

EPC-5A Hardware & Software Reference ManualPage viiiList of TablesTable 1-1. EPC-5A Environmental and Electrical Specifications...

Strany 136

EPC-5A Hardware & Software Reference ManualPage 7466VME Modifier Register (8151h)VME WA23-22 BORD IACK AM5 AM4 AM2 AM1This register is also used w

Strany 137

Chapter 6: The VMEbus InterfacePage 75VME Interrupt Enable Register (8153h)IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 MSGRThis is a mask of the interrupt cond

Strany 138 - Page D-4

EPC-5A Hardware & Software Reference ManualPage 7666Module Status/Control Register (8156h)DONE AS DS0 DS1 1 1 (res.) 1This register contains misce

Strany 139 - Appendix G: Glossary

Chapter 6: The VMEbus InterfacePage 77VMEbus Mapped RegistersThe EPC-5A follows the lead of the VXIbus specification in defining a standard set ofconf

Strany 140 - EPC-5A Hardware Reference

EPC-5A Hardware & Software Reference ManualPage 78662. A read of the response register from VME clears the LOCK bit(immediately after the current

Strany 141 - Glossary

Chapter 6: The VMEbus InterfacePage 79Low-Level Programming the VMEbus InterfaceIt is recommended that rather than performing accesses in this low-lev

Strany 142

EPC-5A Hardware & Software Reference ManualPage 8066Bits 3-0 Use the address modifier (in binary form) to determine the appropriate values for the

Strany 143

Chapter 6: The VMEbus InterfacePage 81Example #2 performs a byte (8-bit) write into the VMEbus A32 space. Here theupper 16 bits of the VME address ne

Strany 144

EPC-5A Hardware & Software Reference ManualPage 8266Microsoft C code for Example 2 -LWORD addr; /* 32-bit A32 address */BYTE data;BYTE far * w

Strany 145

Chapter 6: The VMEbus InterfacePage 83• Keep in mind that while PC/AT interrupts are edge sensitive, VMEbus interruptsare level sensitive. As such, y

Strany 146

Page 1111. Product DescriptionPurposeThis manual was written to provide detailed hardware reference information forOEMs, system integrators, and othe

Strany 147

EPC-5A Hardware & Software Reference ManualPage 8466Start of Loop• Determine the source of the interrupt or event. This can be done by reading th

Strany 148

Chapter 6: The VMEbus InterfacePage 85• Upon returning from the interrupt handling routine, go back to the beginning ofthe loop until no more interrup

Strany 149

EPC-5A Hardware & Software Reference ManualPage 8666NOTES

Strany 150

Page 8722777. ConnectorsThis chapter specifies the details of the connectors on the EPC-5A. Please note,however, that all the connectors adhere to e

Strany 151

EPC-5A Hardware & Software Reference ManualPage 882277Parallel PortThe DB-25 LPT1 parallel port connector is an Output-Only device defined as: Pin

Strany 152

Chapter 7: ConnectorsPage 892277Speaker HeaderThe speaker header is located on the EPC-5A circuit board and is defined as: Pin Signal Pin Signal1

Strany 153

EPC-5A Hardware & Software Reference ManualPage 902277NOTES

Strany 154

Page 91888. Upgrades▲▲!CAUTIONDo not handle the EPC-5A module unless you are in a static-freeenvironment.MemoryThe EPC-5A can be configured for vario

Strany 155

EPC-5A Hardware & Software Reference ManualPage 9288Figure 8-1. SIMM Memory Location.After upgrading the memory, power up the machine and press F2

Strany 156 - Page I-VI

Page 93999. Troubleshooting & ErrorMessagesTroubleshootingThis section deals with problems that you may encounter that do not provide an errormes

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